Chapter 1: Combinational Logic

This chapter follows Lecture 1. It gives you the vocabulary and the habits that every later chapter uses, so it is worth reading slowly, even though each idea in it is small.

You write software already, and the first thing to unlearn is that a circuit is something that runs. A circuit is a set of parts that are all connected and all working at once. Its output at any moment is decided by the values on its inputs at that moment. A circuit like that is called combinational, and it is the only kind this chapter, and the next two, deal with. Circuits that remember what happened earlier come in Chapter 4.

The chapter looks at the same small circuits in several ways. A circuit can be drawn as gates, written as an expression, listed as a truth table, and described in SystemVerilog. You will learn to move between all four, and to check that they say the same thing. The tables, gate drawings and listings in this chapter are checked by programs for agreement with one another and with a written specification, so when two of them appear together they agree. No program checks that the specification says what you need, or that a sentence describing a figure is right. The few sketches that explain an idea instead of a circuit say so on the figure.

What you will be able to do

After this chapter you can:

• explain what a bit, a signal and a logic gate are, and why a gate's output depends only on its inputs;
• put the steps from a drawing to a working device in order, and say why you simulate before you build;
• recognize the seven gates by their symbols, and write each as an expression with an overbar for NOT;
• lay out a truth table in the book's row order, and count its rows and the number of functions it could describe;
• turn a rule written in words into an expression, a circuit and a truth table, and read an expression back out of a circuit;
• tell combinational logic from sequential logic by identifying stored state, that is, whether the outputs can depend on earlier inputs;
• write a small SystemVerilog module with assign and with gate primitives, and recognize the mistakes a first module usually has.

Sections

• 1.1 What digital design is
• 1.2 Logic gates and truth tables
• 1.3 Three equivalent forms: circuit, expression, truth table
• 1.4 Combinational and sequential logic, and a first SystemVerilog module

Section 1.1 is the picture of the whole field: wires, gates, and the path from a drawing to a chip. Section 1.2 builds the vocabulary of gates and tables. Section 1.3 puts them together on three small car-dashboard circuits and shows why a table does not hand you a small circuit. Section 1.4 draws the line between circuits that compute and circuits that remember, and then writes the dashboard circuits as SystemVerilog.

This chapter only describes circuits. Making them smaller comes in Chapters 2 and 3, and testing a module with a simulator comes in Chapter 3.