2.1 Boolean algebra
Why this matters
A circuit that is built from a messy expression costs more gates, more wiring and more delay than one built from a tidy expression for the same function. Boolean algebra is the toolbox for going from the messy form to the tidy one without changing what the circuit does. Every later technique in this chapter, from minimizing to NAND-only designs, is a few of these laws applied in a useful order.
Learning goals
Section titled “Learning goals”- State each basic law of Boolean algebra, including the distributive law that has no counterpart in ordinary arithmetic.
- Check a proposed law or a proposed simplification by trying every input row.
- Read the expression that a circuit computes, gate by gate.
- Simplify an expression one step at a time, naming the law that justifies each step.
- Spot a step that changes the function.
Intuition first
Section titled “Intuition first”In ordinary algebra a variable stands for any number, and you rewrite expressions using facts such as . Boolean algebra is the same game with two differences. A variable can only be 0 or 1, and the operations are OR (written ), AND (written as a product) and NOT (an overbar).
Because there are only two values, a claim about an expression with variables can be settled by brute force: try all combinations. A law is a claim that has survived that test for every choice of its variables. Here is the test for the law that surprises most people, in which OR distributes over AND. The two columns are the two sides:
| X | Y | Z | L | R |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 0 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Description: A truth table with inputs X, Y and Z and two outputs, L and R. The eight rows give the same value in L and R on every row.
Every row agrees, so the law holds. Ordinary arithmetic has no such law: with numbers, is 14 but is 30. The brute-force test is also why you can trust the laws below even without a proof: each one is a small table.
What makes the laws useful is that rewriting never changes the function, only its shape. If two expressions agree on every row, you can build whichever one is cheaper.
Two Boolean expressions are equivalent when they give the same output for every combination of input values. Rewriting an expression into an equivalent one is always allowed. A step that produces a non-equivalent expression is an error, however plausible it looks.
A literal is a variable or its complement: and are two different literals of the variable . The number of literals is one measure of how big an expression is. Section 2.3 uses the related count of gate inputs when it compares circuits.
The laws
Section titled “The laws”Each law below is a pair of expressions that a program has checked equal on every input row. They come in pairs: swap every with a product, and every 0 with a 1, and a law turns into its partner. The Section 1 review calls the null law "domination" and the complement law "negation", and lists the six absorption identities together under the one heading "absorption". (fact ch02/law-names) This book says null and complement, with the other name in parentheses in the tables below, and uses "absorption" as the one name for all six. The derivations print the same names: Null, Complement, Double negation for the law that removes two bars, and Absorption for all six absorption identities.
Constants and repetition. These say what happens when one operand is a constant or when a variable meets itself.
| Law | The OR form | The AND form |
|---|---|---|
| Identity | ||
| Null (domination) | ||
| Idempotent | ||
| Complement (negation) |
A variable and its own complement always disagree, so exactly one of them is 1. That is why is 1 and is 0. The last basic law has no pair: is the double negation law.
Order and grouping. These are the ones from ordinary algebra.
| Law | The OR form | The AND form |
|---|---|---|
| Commutative | ||
| Associative |
Because grouping never matters, a long run of ANDs or of ORs is written without parentheses, and a derivation on this page treats it as one product or one sum.
Distribution. AND distributes over OR, as in ordinary algebra, and OR also distributes over AND, which is the new one:
| Law | Form |
|---|---|
| Distributive, AND over OR | |
| Distributive, OR over AND |
Read the second one in the direction that shrinks an expression: whenever two sums share a variable, you can pull it out.
Absorption. These six let a term or a variable disappear because the rest of the expression already covers it.
| Law | The OR form | The AND form |
|---|---|---|
| Absorb a product | ||
| Merge two terms | ||
| Drop a complement |
The middle row is the pair that Chapter 3 calls the uniting theorem. Try the OR form of the third row on the numbers 0 and 1 if it looks wrong: when is 1 both sides are 1, and when is 0 both sides become . The derivations below label all six as Absorption.
Reading a circuit
Section titled “Reading a circuit”Before simplifying an expression you usually have to get it from somewhere. A circuit gives it to you: write the output of each gate in terms of its inputs, working from the inputs to the output.
Look at Figure 2.1.2. B and C each feed several gates, and the dots mark where a wire splits. The AND gate at the top takes A and B, so its output is . The OR gate below it takes B and C and gives . The AND gate at the bottom takes C and B and gives . The AND gate on the right takes those two and gives . The OR gate at the end combines the top product with that, so the output is .
A logic schematic with inputs A, B and C and output Q.
AND gate g1: inputs A and B; output n1.
OR gate g2: inputs B and C; output n2.
AND gate g3: inputs C and B; output n3.
AND gate g4: inputs n2 and n3; output n4.
OR gate g5: inputs n1 and n4; output Q.
It computes Q = A and B or B and C and (B or C).
Description: A circuit with inputs A, B and C and output Q: an AND gate on A and B, an OR gate on B and C, an AND gate on C and B, an AND gate whose inputs are the outputs of the OR gate and the lower AND gate, and a final OR gate that combines the top AND gate with that last AND gate.
The next step is to see whether all five gates are needed. Each line below follows from the one above it by the law named beside it.
| Expression | Law used |
|---|---|
| Distributive | |
| Commutative | |
| Idempotent | |
| Idempotent | |
| Idempotent | |
| Commutative | |
| Distributive |
The first step multiplies out the factor . The second reorders the first long product so that the two copies of B sit together, and the next two steps use on and then on . The fifth step uses on the two equal terms. The last two steps swap to and pull the common B out.
The result needs only an OR gate and an AND gate, as in Figure 2.1.3, so two gates replace five. The program that drew both figures checked each against the expression above, so the two circuits are known to compute the same function.
A logic schematic with inputs A, C and B and output Q.
OR gate g1: inputs A and C; output n1.
AND gate g2: inputs n1 and B; output Q.
It computes Q = B and (A or C).
Description: A circuit with inputs A, B and C and output Q: an OR gate on A and C feeds an AND gate whose other input is B.
Now a circuit with inverted signals. In Figure 2.1.4 a NOR gate takes A and B, an AND gate takes A and an inverted B, a second AND gate takes an inverted C and an inverted D, and a three-input OR gate combines the three outputs.
A logic schematic with inputs A, B, C and D and output X.
NOT gate n1: input B; output n2.
NOT gate n2: input C; output n4.
NOT gate n3: input D; output n5.
NOR gate g1: inputs A and B; output n1.
AND gate g2: inputs A and n2; output n3.
AND gate g3: inputs n4 and n5; output n6.
OR gate g4: inputs n1, n3 and n6; output X.
It computes X = not (A or B) or A and not B or not C and not D.
Description: A circuit with inputs A, B, C and D and output X. A NOR gate takes A and B. An AND gate takes A and the output of an inverter on B. A second AND gate takes the outputs of an inverter on C and an inverter on D. A three-input OR gate combines the three gate outputs.
The output is . Notice the first term: the bar sits over the whole sum , because the NOR gate inverts the OR of its inputs. We will simplify it. The first step needs DeMorgan's law, which turns a bar over a sum into a product of bars. Section 2.4 gives that law its own treatment; here we only use it in this direction.
| Expression | Law used |
|---|---|
| DeMorgan | |
| Distributive | |
| Complement | |
| Identity | |
| DeMorgan | |
| DeMorgan |
The first step replaces the bar over by . The second factors out of the first two terms, and the third uses . The fourth drops the 1. The fifth reads backwards as a bar over , and the last step does the same trick on , which is a bar over the product . The two circuits are Figure 2.1.4 and Figure 2.1.5: seven gates and inverters became two gates.
A logic schematic with inputs B, C and D and output X.
OR gate g1: inputs C and D; output n1.
NAND gate g2: inputs B and n1; output X.
It computes X = not (B and (C or D)).
Description: A circuit with inputs B, C and D and output X: an OR gate on C and D feeds a NAND gate whose other input is B.
The final form has a single bar over a product, the whole of . Writing a bar over each letter instead would give a different function. Section 2.4 explains why.
A step that looks harmless
Section titled “A step that looks harmless”Every law above is an equality, so a step is only as good as the law behind it. The most common way to go wrong is to use a real law on the wrong thing.
You want to split the term in two. Which of these rewrites keeps the function the same?
This function of three variables is a sum of five products. Each step is one law, and the program checks that each line equals the one above it. A step that, like the first choice above, swapped for would be rejected.
| Expression | Law used |
|---|---|
| Absorption | |
| Distributive | |
| Complement | |
| Identity |
The first step applies twice, once with C in the role of Y and once with in that role, because already covers both of those products. The answer is .
Course conventions
Section titled “Course conventions”How CSE 369 writes this
NOT is an overbar, never a prime or a tilde: . AND is written by putting letters next to each other () or with a centered dot, and OR is . The complement of a product is one bar over the whole product, so and are different expressions. In this book every expression is drawn from a parsed expression, so each bar covers exactly the letters it should.
Pitfalls
Section titled “Pitfalls”Common pitfall
- Putting a bar on each letter when the bar belongs over a whole product or sum. and differ, and so do and . Try one input row on each form when you are unsure.
- Dropping a complement that is not covered. is , not . The bar goes away only because the term is absorbed into the plain sum.
- Splitting a term by multiplying only part of it by . The factor must multiply the whole term, or the function changes.
- Applying the arithmetic distributive law to OR, so that becomes . Those are different functions. The correct law is .
- Naming a law that does not match the step. Check the named law against the actual change: a step that merely reorders letters is Commutative, a step that removes a repeated letter is Idempotent.
Check your understanding
Section titled “Check your understanding”Take the quiz (5 questions)
Which of these is equal to ?
Which of these is equal to ?
How many gates does the five-gate circuit of the first example use?
Which of these is a simplified form of the output Q of that circuit?
Which of these is equal to the output X of the second example circuit?
Exercises
Section titled “Exercises”Show with a truth table that and are equal. Then say, in a sentence, why the rows where X is 1 are easy.
Hint
Solution
The table of both sides is the one in the intuition section, and the L and R columns agree on every row. When X is 1 the left side is , which is 1 by the null law. The right side is , and each factor is 1 by the null law, so the product is 1 as well. When X is 0 the left side is and the right side is . Both reduce to by the identity law.
| X | Y | Z | L | R |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 0 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Description: A truth table with inputs X, Y and Z and outputs L and R, with the row where X is 1 and Y and Z are 0 highlighted. L and R agree on every row.
Write the output Z of Figure 2.1.7 as an expression, then simplify it step by step, naming the law for each step.
A logic schematic with inputs A and B and output Z.
NAND gate g1: inputs A and B; output n1.
OR gate g2: inputs A and B; output n2.
AND gate g3: inputs n1 and n2; output Z.
It agrees with the function logic:ch02/s01-ex-circuit#Z.
Description: A circuit with inputs A and B and output Z: a NAND gate on A and B and an OR gate on A and B both feed an AND gate.
Hint
Solution
The NAND gate gives and the OR gate gives , so Z is their product. First turn the bar into sums, then distribute twice, then use the complement law on the two terms that contain a variable and its complement.
| Expression | Law used |
|---|---|
| DeMorgan | |
| Distributive | |
| Distributive | |
| Complement | |
| Identity |
The result is , which is the exclusive-or of A and B. The NAND-and-OR circuit is another way to build it.
Simplify and name the law.
Hint
Solution
The first two factors have the shape with and , which is X by absorption.
| Expression | Law used |
|---|---|
| Absorption |
The result is . The circuit for the original expression needs three gates plus an inverter, and the result needs one gate.
A classmate simplifies to and says "the is covered by ". Find one input row where the two expressions differ, and give the correct simplification.
Hint
Solution
Take A = 0 and B = 1. The expression is 1 there, because the product is 1, but A alone is 0. The term is not covered by : it is exactly the case that does not cover. The correct law is , so the answer is .
Simplify to a product of a sum and a single literal, naming the law for each step.
Hint
Solution
All three terms contain . Factoring it out leaves the sum . The first two terms merge into , and then becomes .
| Expression | Law used |
|---|---|
| Distributive | |
| Absorption | |
| Absorption |
The result is : the function is 1 exactly when C is 0 and at least one of A and B is 1.